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Interfacing (DSI, CSI, I2C, etc.) • Re: CM4, DSI data append one pixel every horizontal line

I am sorry that I am now corrected original values to github. Now there is original values. But I know that displays work well with different timing values. I make six years ago custom LVDS driver to Rockchip 3399 processor but, there can make timings direct to devicetree and RPi this is not possible. Then I try to hundreds of different timings because i don't have that panel specs. And I see many different values work well in timing settings. Like now my first loaded driver was in my CM4 and work same way than original manufacturer values. So I am not teasing, only need advise to search what can be problem on RPi kernel? I test almost all posible settings before wrote here.

I try now with older kernel version 5.10.

Statistics: Posted by Peksu — Fri Jul 26, 2024 6:45 pm



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