Not my experience (though obviously dependent on data pattern). With ASCII data in 8-bit bytes, the last data bit is always zero, and so once desyncrhonized, giving either a framing error or fluking a '1' bit as it looks for the stop bit in what should be the middle of the character, it will then start searching for the start bit again and is likely to see the trailing bit of the character as a false start bit, hence repeatedly receiving out of synchronization and then immediately going wrong again on the next character. The stop bit gets taken as bit0 of the received character, the start bit as bit1 etc. up to the last bit of the received character is what should have been bit5, what should have been bit 6 is treated as stop bit (quite likely to be a '1' if it's ASCII, but even if not a framing error doesn't actually help recover sync), then it starts again and finds bit 7 as the false start bit.Framing error means that the stop bit doesn't match.
With proper speed, it's very unlikely not to synchronize after few errors.
Note also that this particular UART can't be configured to enforce 2 stop bits on receive; if the other end were generating two stop bits then that would help a bit but not fix things.
Statistics: Posted by arg001 — Sat Dec 14, 2024 6:59 pm
